One chain, many engines

Each PSS entry selects an engine and a command body, then points to the next entry. A million scheduled engine commands do not mean a million driver calls. The resident design submits a linked program and waits for its completion.

Resident does not mean everything fits twice

The encoder and decoder share one accelerator arena in the camera demos. A phase switch copies a prepared image into it. Weights are reused inside each phase; decoder K/V stays resident across generated tokens.

VREG banks are tile storage. They are not an independently managed 8 MB SRAM cache.

Pack → multiply → decode → accumulate

1. Gather the activation and trained weight slice.
2. Convert selected data to FP16 and pack for the operand layout.
3. Run the MMAP tile and decode its output order.
4. Accumulate K-slice partials in FP32; apply bias once.

Reuse an operand tile in VREG where scheduling permits, instead of repeatedly staging it through DRAM.

Three different “transposes”

Projection weights: ONNX may store output×input; the kernel needs the matching matrix orientation.

Attention K: [token, head, feature] becomes [head, feature, token] for QKᵀ.

MMAP packing: blocked operand/output lane order is a physical permutation, not an algebraic transpose.

This 8×8 teaching grid and 4×4 packing are illustrative. Actual address generation depends on the emitted binding, type/form flags and tile geometry; do not use this graphic as an address-map specification.

Attention at position 4

Bright cells are available past/current positions. Future positions are masked. Example dimensions and token IDs are illustrative.

The output path

In this image

Prompt prefill has populated the cache. Click to predict the next example token.

Q heads and K/V heads

SmolVLM/SmolLM use grouped-query attention: nine query heads share three K/V heads in these decoder geometries. Each query head reads its assigned K/V head. v145 instead uses eight Q and eight K/V heads.

RoPE rotates Q and K by token position before they enter attention in the text/VLM decoders. V is not rotated. Whisper Tiny in v149 instead uses learned absolute position embeddings; its encoder attention is bidirectional and its decoder uses causal self-attention plus cross-attention.

Why keep FP32 correction?

The v145 LM head evaluates the vocabulary using FP16 MMAP, then re-scores its top 16 candidate rows in FP32 KP. Host code gathers the trained BF16 candidate rows; the correction arithmetic runs on AiOnIc.

This is a candidate approximation: it cannot recover a winning token absent from the top-16 set. Agreement is validated on retained prompts, not guaranteed for every input.

v144 naming caveat

The board's smollm_voice_v144/ holds private PocketSphinx runtime files. The active English voice launcher and cached SmolLM kernel remain under smollm_chat_v143/. v144 is the voice extension, not a separately validated new decoder architecture.

Caption agreement ≠ visual truth

A converted model can reproduce ONNX exactly and still misdescribe a scene. v139's fast 384 mode fails strict FP32 feature tolerance on retained images while matching their caption tokens. Native512 is a different accuracy/performance tradeoff.

Speech now has an accelerator path

v145 retains the CPU Vosk path. v149 adds Whisper Tiny: CPU log-Mel features → FP16 DMAP/MMAP convolutions and projections → resident encoder attention → cached speech decoding → recognized Japanese → resident LLM-jp → streamed 48 kHz Open JTalk.

Each Whisper decoder layer chains Q/K/V in one submission. Selected cached attention stays FP32 on the CPU: the faster full-MMAP trial changed reference tokens. Lower-rate TTS trials were rejected in favor of the original voice.

Source notes

This guide is grounded in board README/methodology files, actual launchers and retained command-count reports for v124, v125, v139, v143/v144, v145 and whisper_tiny_v149. See sources.md for paths and evidence. Animations are teaching diagrams, not hardware traces.

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What a fair comparison requires

Pin the same checkpoint, prompt/template, tokenizer, image pixels and processor. Record precision and corrections, context length, batch size, power mode, runtime version, output-token limit/EOS, loading boundary and sample count. Compare accuracy as well as latency.

Coverage and provenance

Accessed23 Oct2026. Published numbers were not reproduced here. Family rows identify model or quantization differences explicitly; context rows are different models. Missing data stays missing. No power-efficiency claim is made without measured board-input energy.

Machine-readable evidence · Metric definitions and sources

The shared conversion problem

Detection, classification and language models all need matching parameters, deliberate tensor layouts and a validated execution schedule. The data-flow and conversion chapters explain how our language demos approach that work.

Explore the original posts

Descriptions are short summaries of Acube’s public Technology posts. They do not establish throughput, power consumption or current deployment status.